The First AI-Native Platform for PIC Design
Design Photonic Circuits at the Speed of Light
The first AI platform purpose-built for photonic circuit design. From natural-language intent to production-ready GDSII — every step validated, every decision inspectable.
Powered by open-source foundations · Trusted by photonic engineers worldwide
The Problem
A $14B Market Held Back by One Bottleneck.
PIC design requires a rare combination of PhD-level physics expertise and advanced programming skills. The global photonics market is projected to exceed $50B by the early 2030s — yet the shortage of qualified designers is the single biggest barrier to innovation.
The Rare Expertise Gap
Current tools demand complex Python scripting — a rare combination of semiconductor physics AND software engineering. A single PIC layout routinely takes weeks to months of iterative scripting and debugging.
The €100K Cost of Error
A tape-out costs €50K–€100K. DRC violations cause costly rejection cycles and missed MPW windows. Worse: functional errors pass DRC but only surface after fabrication — the chip is manufactured, paid for, and doesn’t work.
Institutional Knowledge Loss
Scripts are the tip of the iceberg — the visible result of thousands of failed attempts and reasoning chains that are never documented. When the expert leaves, the why vanishes with them.
The Contextless LLM Trap
Engineers increasingly turn to ChatGPT for PDK code — but raw LLMs hallucinate non-manufacturable structures and introduce severe IP leakage risk: proprietary designs sent to third-party servers with zero data protection.
The Platform
Chat. Canvas. GDSII. All in One.
Unlike approaches that use GenAI to generate circuit code directly, Dara uses AI for intent understanding only — every design action is constrained by deterministic physics tools that enforce manufacturing rules. Describe. Design. Deliver.
Describe
Chat
Natural-Language Intent
Tell Dara what you need in plain English. The AI parses your intent and selects foundry-validated components from the active PDK—no Python scripting required. The "engineer next to you" paradigm.
Design
Canvas
Agent-Orchestrated Layout
Watch specialist agents place, route, and connect your circuit in real time. Manufacturing constraints are injected before the agent acts, blocking DRC violations proactively, not reactively.
Deliver
GDSII
Tape-Out Ready
Export DRC-clean, production-ready GDSII instantly. As a bonus, every design action produces inspectable, PEP-8 compliant Python as a transparent audit trail. No black boxes. No vendor lock-in.
Describe. Design. Deliver.
Why Dara Is Fundamentally Different
Two-Layer Validation
DRC violations caught before fabrication. Functional errors (wrong coupling, mode mismatch) caught before tape-out — not after the €100K chip is manufactured.
Contextual Intelligence
Agents operate with deep PDK context. They understand why a waveguide must be routed a certain way — capturing the reasoning usually lost when the expert leaves.
Multi-PDK Support
One platform, every foundry. Switch between process design kits without reworking your layout.
Data Sovereignty
Stateless AI agents — no training on client data. PDK source code never reaches the AI. Dual IP protection with on-premise deployment available.
Under the Hood
Every Decision. Fully Inspectable.
Black-box automation is a liability. You get a layout, but you lose the reasoning. Dara's Glass Box approach inverts this: every design choice is fully traceable and physics-verified. From initial intent to production-ready GDSII, the entire reasoning chain is logged, inspectable, and reproducible. The thousands of iterative decisions that are usually lost when an expert leaves are now captured — remaining exclusively your proprietary intellectual property.
Full Audit Trail
Every agent reasoning step is logged. You see not just the result, but the why behind every design choice.
Deterministic Layout Generation
Automated, DRC-clean circuit generation. Every component parameter is exposed, modular, and natively Git-compatible. No black boxes.
Enterprise Knowledge Sharing
Eliminate siloed knowledge. Institutional expertise is captured seamlessly, ensuring every iteration advances the collective intelligence of your engineering team.
Agent Pipeline
Describe
Natural-language intent
Layout
Agent places & routes
Simulate
Physics validation
DRC Check
Rule compliance
Export
Production GDSII
Output
Production-Ready GDSII
+ Full audit trail + Inspectable Python code
Trust through transparency.
In photonics, reproducibility is non-negotiable. Dara captures not just the design, but the full reasoning chain — so when the expert leaves, the knowledge stays.
Capabilities
Six Pillars. One Platform.
From intent to tape-out, Dara covers every stage of the photonic design workflow. Each capability is built on the same agent-first architecture — designed to work together, not as disconnected tools bolted on after the fact.
Design Compiler
Intent to Layout
Translate engineering intent directly into hierarchical circuit topologies. Dara’s deterministic planning pipeline decomposes your parameters into a complete layout — selecting foundry-validated components, computing physical placement, and generating optimized routing paths.
Sim Engine
Physics-Grounded Validation
Every design is validated against a deterministic physics engine before it reaches fabrication. Coupling ratios, mode confinement, bend loss, and waveguide performance are checked continuously — not as a post-processing step.
IP Fortress
Data Sovereignty by Design
Stateless AI agents never train on your data. PDK source code is loaded at runtime and never transmitted. Dual IP protection with on-premise deployment available — because your photonic designs are your competitive advantage.
Glass Box
Full Transparency
No black boxes. Every agent action, physical constraint resolution, and routing decision is logged in a full audit trail. The generated reasoning chains are exclusively your proprietary intellectual property to keep, review, and version-control.
Team Orchestration
Multi-User, Multi-Circuit
Manage multiple circuits in a single project. Collaborate across teams with version-controlled designs, shared component libraries, and role-based access — all in a unified web-based environment.
Standards Compliance
Foundry-Ready Output
DRC-clean GDSII output that meets foundry tape-out requirements. Multi-PDK support means one platform for every foundry — switch process design kits without reworking your layout.
Data Sovereignty
Your IP. Architecturally Protected.
Most AI platforms promise they won't look at your data. Dara makes it architecturally impossible. Stateless agents process your designs in memory and discard them after execution — there is nothing to steal, subpoena, or accidentally leak.
Three-Layer Protection
Stateless Agents
AI agents process your design in memory, then discard all data. No persistence, no model training on client data. Ever.
PDK Source Isolation
Foundry PDK source code is loaded at runtime and never transmitted to AI models. The agent sees component specs, not proprietary code.
On-Premise Deployment
For maximum security, deploy the entire platform behind your firewall. Full air-gapped operation available.
Zero Data Retention
0 bytes stored
No Cloud Training
Models never learn from your data
Dual IP Protection
Your design + foundry PDK
They can't steal what doesn't exist.
Stateless architecture means your photonic designs are processed in-memory and never persisted. This isn't a policy — it's a technical impossibility.
AI-Native Impact
A New Workflow Paradigm.
The bottleneck isn't typing speed — it's the gap between a photonic vision and a fabrication-ready layout. Dara closes that gap through intent, not scripting.
faster
Time-to-Layout
Compared to manual Python scripting
Git-native
Version Control
Every topological change is tracked
lines of code
Python Required
Translate intent directly to layout
active
Automated Workflows
Agents enforce DRC constraints proactively during placement and routing
captured
Zero Knowledge Loss
Every design decision is documented and reproducible
black boxes
Full Transparency
Every layout decision generates an auditable Python artifact
Early Access
Ready to Design Without Compromise?
Join the waitlist for early access to Dara — the first AI-powered photonic design platform that keeps your intellectual property where it belongs: with you.
- Full design sovereignty — your IP never leaves your infrastructure
- AI-accelerated layout from concept to GDSII in seconds
- Foundry-validated PDK support for production-ready chips
Strategic Partnerships
Looking for deep PDK integration or co-development? We are currently exploring Pilot Programs with a select few enterprise and foundry partners.
Contact the Founders